Lab 9 – JFET Amplifier
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References: |
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Floyd, Thomas L., Electronic Devices, 7th
Ed., Chapter 7 and ·
Fairchild Semiconductor Data Sheet for 2N5484 /
2N5485 / 2N5486 |
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Objectives: |
After completing this experiment, you will be able to: ·
Demonstrate the operation and characteristics
of a self-biased common-source amplifier. |
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Procedure: |
1. Determine
the values of VGS(off), IDSS and gm0 of the JFET you will be using
for this lab. (Hint: use the techniques
from Lab 8 to find VGS(off) and IDSS, then
use Equation 7-3 to determine gm0.) 2. Construct
the circuit in Figure 1 using a 2N5486 JFET.
Measure the quiescent drain current ID, gate-to-source voltage VGS and the drain voltage VD.
Use Equation 8-5 to determine if the measured value of ID is consistent with the
calculated value (Hint: calculate the right side of Equation 8.5 and see how
close it matches the left side). 3. Calculate
the JFET’s transconductance gm
at the quiescent point. (Hint: use
Equation 7-2). 4. Calculate
the voltage gain and expected Vout
of the circuit (Hint: use Equation 8-6 for the AC portion of Vout). 5. Apply
Vin and measure Vout. Compare the measured and calculated values
of Vout. 6. Use
the Agilent 54621A Oscilloscope to capture the display of Vin and Vout. Print the image, label appropriately, and
attach to your lab report. Consult the
User’s Guide for how to accomplish this. The report for this lab is due at the end of the lab
period. Please use the green
engineering paper. Remember to show
your calculations! |
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Figure 1: |
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